A Shanghai-based semiconductor startup has launched a new 8-inch pilot facility dedicated to two-dimensional materials, marking a significant step in China’s effort to bypass Western equipment restrictions. Yuanjiwei’s new manufacturing line, highlighted in a recent industry roundup by Semiconductor Engineering, will focus on refining process technologies and running low-volume batches. The company’s ultimate objective is to achieve performance on par with 5-nanometer silicon chips by the end of the decade, entirely without relying on extreme ultraviolet (EUV) lithography systems.
Two-dimensional semiconductors, materials in which the active layer is just one or a few atoms thick, offer a potential path around the fundamental physics constraints that make it increasingly difficult to shrink conventional silicon transistors. At sub-5nm nodes, silicon’s bulk properties begin to cause unacceptable levels of quantum tunneling and short-channel effects, requiring increasingly sophisticated lithography and process control to manage. 2D materials such as molybdenum disulfide (MoS₂) and tungsten diselenide (WSe₂) maintain their electronic properties at atomic thickness, theoretically enabling transistor geometries that would be physically impossible in silicon without the same lithography precision requirements.
A Materials Route Around the EUV Bottleneck
The strategic logic of Yuanjiwei’s approach is directly tied to China’s constraints on chip access. ASML’s EUV lithography machines, which are essential for manufacturing chips at 7nm and below using conventional silicon processes, have been subject to Dutch export controls since 2019 and cannot be shipped to China. This has forced Chinese chip manufacturers to develop workarounds, including multi-patterning techniques that use older DUV equipment to approximate EUV resolution, but these approaches are costly, yield-limited, and ultimately constrained by the same fundamental physics that EUV was designed to address.
Two-dimensional semiconductors offer a different kind of workaround: rather than trying to achieve EUV-equivalent resolution with inferior lithography, 2D materials potentially enable advanced transistor performance at geometries that older equipment can pattern. If Yuanjiwei’s approach works at production scale, it could represent a genuine alternative path to advanced chip performance — one that is not dependent on any equipment that China currently lacks access to.
The 8-inch pilot line is a significant step toward validating this approach at a scale relevant to commercial production. Most 2D semiconductor research has been conducted at the laboratory scale on small wafers or even individual flakes, and the transition to 8-inch wafer processing poses substantial challenges in material uniformity, defect density, and process control. Yuanjiwei’s ability to open a functioning pilot line suggests that the company has made meaningful progress on at least some of these challenges.
Context: China’s Parallel Chip Development Tracks
Yuanjiwei’s 2D semiconductor initiative is one of several parallel tracks in China’s effort to develop advanced chip manufacturing capabilities that do not depend on restricted Western equipment. Chinese startup DFSX unveiled its DF1000 AI accelerator earlier this month, demonstrating that competitive AI inference performance can be achieved at the 14nm node, a process node that Chinese manufacturers can access without EUV.
Yuanjiwei’s 2D semiconductor approach is more ambitious and longer-dated, targeting a 2029 timeline, but it addresses a more fundamental question: whether China can eventually reach the performance frontier of semiconductor manufacturing through a different materials and process pathway rather than simply catching up on the same trajectory as Western manufacturers.
The answer to that question has significant implications for the long-term effectiveness of US export controls as a tool for maintaining a technology lead. If 2D semiconductors or other alternative materials approaches can deliver competitive performance without EUV, the assumption that controlling access to advanced lithography equipment is sufficient to preserve a durable chip manufacturing advantage becomes considerably less secure. As the US-China chip competition continues to intensify, Yuanjiwei’s pilot line is a small but potentially significant data point in a much larger story about the limits of technology denial as a geopolitical strategy.
The Long Road from Pilot Line to Production
It is important to be clear-eyed about the distance between an 8-inch pilot manufacturing line and commercial production at scale. The semiconductor industry’s history is littered with materials and process innovations that demonstrated compelling results in laboratory and pilot settings but failed to translate to the yield, uniformity, and cost requirements of high-volume manufacturing. Two-dimensional semiconductors face particular challenges in this regard: the materials are difficult to grow uniformly over large wafer areas, the interfaces between 2D layers and conventional dielectric materials are prone to defects, and the integration of 2D transistors with the metal interconnect layers that carry signals between them remains an active area of research.
Yuanjiwei’s 2029 target for 5nm-equivalent chips without EUV is ambitious by any measure. TSMC, which has spent decades and tens of billions of dollars developing its advanced process technology, is only now beginning to manufacture chips at the 2nm node using conventional silicon processes with EUV. For a startup to develop a competitive alternative materials process in three years would represent an extraordinary achievement, one that most semiconductor industry experts would regard as highly unlikely.
What Yuanjiwei’s pilot line does demonstrate, however, is that China’s semiconductor research ecosystem is pursuing a genuinely diverse set of approaches to the advanced chip manufacturing challenge, rather than simply trying to replicate the Western industry’s existing trajectory. The combination of architectural innovations at the model level (as demonstrated by Kimi K3 and DeepSeek), alternative process approaches at the manufacturing level (as demonstrated by Yuanjiwei), and aggressive domestic capacity scaling at the volume level (as demonstrated by CXMT’s record IPO) suggests a multi-front strategy that is harder to counter with any single policy instrument.