DeepSeek’s Ascend Programming Infrastructure Release
DeepSeek’s September 30 release puts programming infrastructure, rather than a new model, at the center of its work with Huawei. Reuters reported that DeepSeek had partnered with Huawei Technologies on tools optimized for Huawei Ascend chips and was opening the underlying infrastructure for the platform, including compute and communication libraries. In DeepSeek’s official WeChat announcement, Huawei was said to have provided full support during development. That description is a company statement about the collaboration, rather than an independent assessment of each company’s contribution or of the resulting software.
The package has a defined scope. The South China Morning Post said DeepSeek released six software modules tailored for Ascend and described them, based on DeepSeek’s WeChat post, as counterparts to its earlier open-source tools for Nvidia AI chips. DeepSeek’s stated objective was a software ecosystem it could characterize as independently controllable. The public materials document an effort to reduce the work needed to target Ascend hardware; they do not establish adoption levels, production deployment, CUDA parity, or hardware superiority. The distinction matters because developers need software interfaces, code generation, and communications support alongside accelerators.
The release also lands just after Huawei Opens openPangu 2.0 Training Stack for Ascend Developers, an EastFrontier article published September 29. That archive entry points to a nearby developer-facing Ascend effort, while the September 30 DeepSeek package concentrates on programming components and libraries. The two items should not be treated as evidence that a single unified stack is available: the cited materials describe separate announced components, repositories, and Ascend-oriented software environments.
TileLang’s Native Ascend 950 Backend
TileLang is the most visible component in DeepSeek’s framing of the release. Reuters described it as a high-level open-source programming language for AI chips, and said DeepSeek presented it as a way to make development more efficient and code logic simpler. DeepSeek also said a high-level language needs to be broadly usable, straightforward to program, and able to reach hardware potential, then positioned TileLang as a simpler programming model than Nvidia CUDA. Those are DeepSeek’s views of the language design, not a published independent comparison of developer productivity or application performance.
The project’s v0.1.15 release, posted September 30, identifies native Huawei Ascend 950 support as an end-to-end NPU backend. It lists native code generation, automatic Cube and Vector scheduling and synchronization, plus mixed SIMD and SIMT programming. The TileLang repository calls the project a concise domain-specific language for high-performance GPU, CPU, and NPU kernels and includes examples such as GEMM, Dequant GEMM, FlashAttention, and LinearAttention. These are project descriptions of intended use and supported examples, not independently reproduced benchmarks.
For engineers, the support is concrete enough to include a target and dependencies. The README lists Ascend 950 as a supported backend through the ascend target, while source builds require USE_ASCEND=ON, CANN, and torch_npu. Those requirements show that the backend remains connected to Huawei’s software environment rather than providing a hardware-agnostic route to an Ascend binary. They also specify what a developer needs before evaluating the release on the stated target. On the same date, EastFrontier noted that Huawei Sets a China-First Date for Ascend 950 Cloud AI; DeepSeek’s TileLang update is relevant to that Ascend 950 timeline because its official release explicitly names the accelerator, but it does not verify cloud availability or commercial deployment.
Compute and Communication Libraries Carry Separate Limits
DeepSeek also published DeepGEMM-Ascend, which its repository identifies as a September 30 port of DeepGEMM to Huawei Ascend. The repository says it is API-compatible with DeepGEMM and supports Ascend 950 devices. Its documented functions include BF16, FP8, and FP4 GEMM, MQA logits, and MegaMoE. The README further describes Ascend-specific approaches involving sparse data loading and coroutine-based pipelining, and acknowledges Huawei technical support and engineering expertise. Each of those capabilities is repository documentation. They should be read as the project’s supported interface and implementation claims, rather than as third-party verification of speed or maturity.
The communication side has an equally important qualification. The DeepEP-Ascend README describes a high-performance library intended for training and inference on Huawei’s NPU platform. It lists all-to-all functions for mixture-of-experts dispatch and combination, including an FP8 route and deferred epilogues. It also lists PP, CP/DP Bucket, and Engram interfaces, with some parts identified as experimental or still in progress. That mix of supported and unfinished interfaces gives the release a more precise boundary than a broad claim of completed Ascend software equivalence.
DeepEP’s performance documentation is more narrowly bounded still. Its measurements were taken on Ascend 950DT NPUs running CANN 9.2.0 with a manually configured proof-of-concept hardware development kit. The README explicitly says that configuration is not a publicly distributed release and that its measurements do not come from the planned commercial hardware development kit. Separately, Reuters said DeepSeek and Huawei jointly advanced a supernode solution based on 128 Ascend 950 chips, optimizing computation and communication.
DeepSeek’s description establishes the configuration and intended optimization work, but it does not demonstrate a commercially deployed system or provide an independently verified performance result. The September 30 repositories instead offer a set of code and documented interfaces against which developers can test those claims if and when public Ascend 950 hardware and software become available.